Changeset 62:feac8788900e in finroc_plugins_scheduling


Ignore:
Timestamp:
21.03.2021 22:40:07 (4 weeks ago)
Author:
Max Reichardt <mreichardt@…>
Branch:
17.03
Phase:
public
Message:

Removes obsolete heuristic in tThreadContainerThread::IsModuleInputInterface (and prints warning should this change behavior anywhere). This fixes subtle bug (w.r.t. to scheduling dependencies) when using only composite ports in component output interfaces.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • tThreadContainerThread.cpp

    r55 r62  
    351351bool tThreadContainerThread::IsModuleInputInterface(core::tFrameworkElement& fe) 
    352352{ 
    353   if (IsInterface(fe)) 
    354   { 
    355     uint port_count = 0; 
    356     uint pure_input_port_count = 0; 
    357     for (auto it = fe.ChildPortsBegin(); it != fe.ChildPortsEnd(); ++it) 
    358     { 
    359       if (data_ports::IsDataFlowType(it->GetDataType())) 
    360       { 
    361         port_count++; 
    362         if (it->GetFlag(tFlag::ACCEPTS_DATA) && (!it->GetFlag(tFlag::EMITS_DATA))) 
    363         { 
    364           pure_input_port_count++; 
    365         } 
    366       } 
    367     } 
    368     return (2 * pure_input_port_count) >= port_count; // heuristic: min. 50% of ports are pure input ports 
    369   } 
    370   return false; 
     353  const core::tFrameworkElementFlags cCHECK_FLAGS = tFlag::PORT | tFlag::INTERFACE | tFlag::INTERFACE_FOR_DATA_PORTS | tFlag::INTERFACE_FOR_INPUTS | tFlag::INTERFACE_FOR_OUTPUTS; 
     354  const core::tFrameworkElementFlags cCHECK_FLAGS_RESULT = tFlag::INTERFACE | tFlag::INTERFACE_FOR_DATA_PORTS | tFlag::INTERFACE_FOR_INPUTS; 
     355  bool result = (fe.GetAllFlags().Raw() & cCHECK_FLAGS.Raw()) == cCHECK_FLAGS_RESULT.Raw(); 
     356#ifndef NDEBUG 
     357  { 
     358    bool former_result = false; 
     359    if (IsInterface(fe)) 
     360    { 
     361      uint port_count = 0; 
     362      uint pure_input_port_count = 0; 
     363      for (auto it = fe.ChildPortsBegin(); it != fe.ChildPortsEnd(); ++it) 
     364      { 
     365        if (data_ports::IsDataFlowType(it->GetDataType()) || it->GetDataType().GetTypeClassification() == rrlib::rtti::tTypeClassification::PORT_COMPOSITE_INTERFACE) 
     366        { 
     367          port_count++; 
     368          if (it->GetFlag(tFlag::ACCEPTS_DATA) && (!it->GetFlag(tFlag::EMITS_DATA))) 
     369          { 
     370            pure_input_port_count++; 
     371          } 
     372        } 
     373      } 
     374      former_result = (2 * pure_input_port_count) >= port_count; // heuristic: min. 50% of ports are pure input ports; THIS is erroneous if interface contains no data ports - or composite ports 
     375    } 
     376    if (former_result != result) 
     377    { 
     378      FINROC_LOG_PRINT_STATIC(WARNING, "Inconsistent results for ", fe); 
     379    } 
     380  } 
     381#endif 
     382  return result; 
    371383} 
    372384 
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